“Design for Manufacturability” (DFM) Tips
These are things that could possibly delay your order and some tips to fix them.
· Gerber Files
Because some design packages produce information that can be misconstrued, it is important that the Gerber files be viewed correctly to avoid costly delays and mistakes. The best way to insure this is to provide Gerber files in 274X format. This means that the aperture list or d-codes for the line width and pad diameter are embedded into the files. A file with an aperture or d-code list should also be provided to answer any questions we may have. It is always recommended that a part number be included on one or both of the etched outer layers. This helps identify the boards at all stages of manufacture as well as completion and will insure that the circuits are always printed correctly (not inverted). This is especially important for single-sided boards which we will always view from the component side looking through the board to see the solder side. This means that any labeling on the board would be viewed correctly on the component (top) side and reversed on the solder side (bottom).
· File Description
It is always helpful to include a text file that lists all the files and a description of what they represent. At a minimum, there should be a file for each layer, a drill file, and if required, a soldermask file and a silkscreen file. Also, it is suggested to include a fab file that lists the finished sizes for the holes and an outline drawing with dimensions. This file often includes specific requirements or notes for the manufacture of the board. An outline should also be provided with each layer of the board. The group of files should then be zipped into one file.
· Hole Sizes vs. Pad Size Problems
In the interest of manufacturability, it is recommended that pads for components be 0.016 inch larger than the hole size called out. Via pads should be 0.010 inch larger than the hole size. Ground and Power layer pads should be 0.045 inch larger than the hole size. These recommendations are minimums to allow for proper drilling and avoid the possibility of shorts or opens.
· Draw and Flash Problems
When designing a board, it is advisable to try to limit the amount of draws you use. Draws are the line segments used to create a circuit trace, text, and often fill patterns. It should only take one line segment to build a continuous trace from one point to another. The width of the trace will be determined by the d-code assigned to that draw segment. We often see circuit traces made up of many small segments connected together to form a single circuit or we will see draw segments duplicated on top of other segments of a circuit trace. This is often caused when changes are made to a design improperly. Another problem comes when flashes are made with draws. A flash is a single x and y coordinate used to locate a pad at the end of a circuit. Once again, the diameter and shape of the pad are determined by the d-code assigned to it. When the designer or the CAD software attempts to create a pad with a draw as opposed to flashing it correctly, the pattern is often made up of hundreds of line segments. Again, a flash would only use one segment.
Yet, the biggest problem we see is when the CAD software creates a fill pattern for shielding or ground or power planes. The fill is usually done with draw segments butting together side by side. The line width resolution defined by the operator for this fill will determine the number of segments required to achieve the desired fill. If this resolution is smaller than necessary, the number of draw segments required will create a file size that is abnormally large and the time required to plot this file to film will be much longer accordingly. Typically, 6-8 mils of resolution will do a good job. This is not to be confused with the clearance setting to be used to maintain a reasonable distance from circuits and pads. On fills this clearance is recommended to be .015 inch or greater.
· Circuit Trace Width and Spacing and Hole Size Problems
Although current technology allows for line widths as small as 2-3 mil line width and spacing, it is not practical to design circuits that test the latest technology. Most board shops do not have the capability to produce boards below 6 mil lines and spacing. It is recommended that circuit traces and spaces be designed with a minimum of 8 mil lines and spaces. Designs below 8 and 8 will make the board harder to manufacture in production and therefore increase the cost of the board.
Technology also allows for holes as small as 0.006” but once again this is not practical and not many board shops possess that capability. We recommend a minimum hole size of 0.016” for vias only with 0.025” being more practical. The boards are drilled on stacked panels during the manufacturing process and the number of panels allowed in a stack is determined by the smallest hole on a board. A board with 0.016” holes will only allow a panel stack of one high, increasing the drilling time significantly and therefore increasing the cost of the board. It is also harder to plate copper and tin/lead to the barrel of a small hole than a larger hole. A larger hole may be more reliable and since with via holes there are no components and often no solder to fill the hole, the integrity of the hole is dependent on the quality of the plating in the hole.
· Silkscreen Problems
Silkscreen or nomenclature artwork is used to locate and identify the component placement on the circuit board. Problems associated with silkscreen artwork are less critical than problems with the circuits or drilling on the board. One problem often due to the smaller parts used in the newer designs is nomenclature that is too small to reproduce or read. Even though it might be easy to read the text on your computer screen at a zoom level of 10 or better, actual size is another story. The process used to put this silkscreen artwork on your board is a screening process capable of reproducing lines of .008 inch resolution and .08 inch text height as a minimum. Another problem that is common with some software packages is the placement of component outlines or text on top of the pads. This can often affect the soldering process, especially for surface mount components. Although we can sometimes remove these lines from the pads, a process known as clipping, there is no guarantee that all violations will be corrected and you will also find that the broken outlines are of no value when they get all chopped up. Try to keep all text and outlines at least .006 inch from all pads except vias.
· Soldermask Problems
Soldermask is an ink that was originally designed for the purpose of preventing solder bridging when the assembly was soldered with a Wave Solder machine. This is done by covering all circuits on the board with a mask and yet revealing all the pads that require soldering. The most common color for this ink is green. The process often used for this soldermask is screening as is done with a silkscreen. The downside of this process is that the screens used to apply the mask on a large panel will often stretch, making it difficult to maintain a tight resolution around the pads. This is not a critical issue for simple boards that are not wave soldered and can be dealt with by opening up the hole size for the soldermask artwork to allow for some slight mis-registration. On busy boards with fine pitch components that require a tight soldermask, a process called LPI or Liquid Photo Imageable soldermask was invented to tighten the resolution and registration. We require a minimum clearance of .005 inch around pads for standard soldermask and .003 inch around pads for LPI soldermask. This means a .040 inch diameter pad would require a soldermask opening of .050 inch or .046 inch respectively as a minimum.
Another process that has become popular is SMOBC or Solder Mask Over Bare Copper. This process was invented because of the problem the soldermask created when using a wave solder. When a soldermask covers wide circuits or plane areas on the bottom or solder side of the board and that board is assembled using a wave solder machine, the solder that coats those circuits under the mask is reflowed. Because it is trapped under the mask and has nowhere to go when it reflows, it can cause the mask to wrinkle and in severe cases the mask might even peel from the plane areas. The solution for this problem was to remove the solder coating from the circuits and apply the mask over the bare copper circuits and then put the solder coating on the exposed pads only. This is SMOBC and it only necessary when you know the boards are going to be assembled with a wave solder machine and the design uses planes or wide circuits on the bottom of the board.
· Circuit Board Outlines
All circuit boards have an outline and we need to know what it is. All layers should include the outline of the board as well as a fab file which should include dimensions. Circuits should maintain a minimum clearance of .025” from the outline. Components should also remain within the outline of the board when possible to reduce the cost of assembly as well as bare board cost for panelization when used to make the assembly more efficient. If spaces are required to be placed between the boards being panelized for assembly because the components will step on each other, a larger panel will be required for a given number of boards to be panelized. This will undoubtedly increase the cost of the bare boards as well as make the assembly less efficient.
· DFM (Design For Manufacturability)
It seems that DFM is being talked about more and more these days and it well should. A board that is designed to work and a board that is designed to be built are often two different things. A board designed for manufacturability will be built cheaper and faster. I have always felt that a one time project requiring a few boards will not need the attention to DFM as a product that is built over and over. I am often told, when making suggestions for a better design, that the problems will be corrected after testing the prototype. Sounds good to me but it seldom happens. The fact is that if the prototype works there won’t be any changes made in the name of DFM. Too bad because there is often much more expense to building that board repeatedly than taking a little extra time to clean up the design one time for manufacturability. I feel the two greatest reasons for design problems are: 1) Autorouters. 2) Designers do not check their work.
Autorouters, both good ones and bad ones, can never replace a good designer. Unfortunately, most of the ones I see designers using are the bad ones. They can turn a 1-layer board into a 2-layer or a 2-layer into a 4-layer and so on. They love vias and as a result they will add much unneeded circuitry to a board. Many of the problems are a result of the parameters set-up by the designer before the autorouting begins. Then when the router fails, hole size parameters are made smaller, line width and spacing are made smaller, and layers are added. Often a router will anticipate space needed for routing circuits so it will hug the pads whenever possible to allow more space and when the job is done, open areas exist and other areas are extremely crowded. This is ok if the designer reviews the artwork and spaces the circuits properly. Why increase the probability of etching shorts and solder bridging when it isn’t necessary. Circuit runs should maintain a reasonable space from pads when space permits and should be centered when passing between pads.
Remember: Check your design before releasing it for manufacture